Amid signs of a possible rebound in chip sales, semi-conductor companies are gathering this week in San Jose, California, to discuss future processor designs for both server and PC chips at the Microprocessor Forum.
Mobile-processor-core designer Arm (ARM) will kick off the conference by announcing two new series of processor cores for embedded and handset processors. The new ARM1176 cores incorporate built-in support for a trusted computing platform called TrustZone.
The TrustZone extensions allowed the processor to distinguish between code that needed to be secure and regular code, and switch between secure and nonsecure operating states as needed, wireless segment manager at ARM, Dave Steer, said.
TrustZone would put users and application developers more at ease with the deployment of mobile commerce applications, Steer said.
When a user made a purchase using a cell phone, the TrustZone extensions allowed the processor to access a secure portion of memory that held a user's credit-card number or other identifying information, he said.
"There's no ultimate solution for people who really want to break security," senior editor with the Microprocessor Report, Max Baron. "However, like a lock on a door discourages people, the lock that ARM is showing is pretty complex in terms of breaking it."
Chip developers will have new ARM11 choices for embedded industrial applications with the release of the ARM1156 cores.
The new cores blended 16-bit and 32-bit instruction sets to give more performance in a smaller package, Steer said.
ARM will release the new cores to its partners in the second quarter of 2004.
Transmeta is expected to unveil its TM8000 Efficeon processor at the Microprocessor Forum.
Efficeon is the latest version of the low-power TM5800 Crusoe processor, which has found a niche within notebooks and Tablet PCs. Efficeon will use a hypertransport bus - credited with delivering excellent performance in Advanced Micro Devices' Opteron and Athlon 64 processors - as the chip's front-side bus. The chip will arrive with a clock speed faster the Crusoe chip's current 1GHz, according to Transmeta.
IBM plans to release details relating to power management in its Power 5 processor, a low-power chip designed for low end and midrange systems when it ships in 2004.
Fujitsu will unveil its 90nm Sparc64 processors at the show, the first of which is expected to be a dual core 2.4GHz processor with 4MB of level 2 cache.
The chip's clock speed will be bumped up to 3.0GHz sometime in 2005.
Sun Microsystems will reveal details on its first Ultrasparc IV, a 130 nanometer process chip with dual UltraSparc III cores.
The UltraSparc IV will have a clock speed of 1.2 GHz, and with 8MB of level 2 cache, will perform at 1.6 to 2 times the speed of Sun's current UltraSparc IIIs.