Toshiba and Samsung have both unveiled the progress they are making in independent research projects aimed at realising chips that are two generations down the line from today's most advanced semiconductors.
The work is targeting chips which have features as small as 45 nanometers across. In comparison, the most advanced of today's chips are produced using a 90-nanometer process and production at the next step technology of 65 nanometers is not expected by chip makers to begin until 2005 at the earliest.
Each generational jump in technology typically allows chipmakers to build more advanced semiconductors that pack more processing power in a smaller package and consume less energy. For this reason, progress in manufacturing technology is a vital part of realizing faster, smaller and cheaper chips and ultimately the products in which they are used.
The first of Toshiba's announcements detailed development of a high performance metal-oxide semiconductor field-effect transistor (MOSFET).
The transistor uses a new gate-oxide technology to combat current leakage, which is expected to become more of a problem in future chips because they use less power.
The company also said it had developed a multi-layer wiring technology suitable for use in chips made with a 45-nanometer process.
Samsung said it had developed a three-dimensional transistor process technology for 50-nanometer production.
Both companies announced their progress this week after papers were presented at the 2004 Symposium on VLSI Technology in Hawaii.
Earlier this year Toshiba and Sony agreed to pool resources on development of 45-nanometer chip technology. The developments announced in Hawaii were achieved by Toshiba prior to the start of the joint development work but were now being used as part of the project, a Toshiba spokesperson, Makoto Yasuda, said