Intel and its competitors are taking different routes to increase performance and cut costs, and a slew of new chips are on the way, technologists were told at the Microprocessor Forum this month.
By this time next year, there may be six or seven x86 processor suppliers taking different approaches to graphics extensions for the MMX instruction set, according to Michael Slater, principal analyst at MicroDesign Resources, California, which sponsors the Forum.
Although Intel will ship chips with Katmai New Instructions, other vendors will implement 3DNow enhancements. Some vendors are also resisting the trend to integrate Level 2 (L2) cache onto the CPU chip.
By the middle of 1999, National Semiconductor will be offering the low-cost MediaPC, which will incorporate graphics, MPEG support, I/O functions, and even a network interface, said Brian Halla, president and CEO at National Semiconductor.
On the high-performance side, National's Cyrix subsidiary is working on an x86 core called Jalapeno, which the company will incorporate into its M3 processor, said Greg Grohoski, M3 project manager. The M3, which should sample by the end of 1999, includes a 256KB L2 cache and a graphics subsystem, he said.
A new x86 processor, the mP6 from Rise Technology, should sample later this year, according to Ken Munson, principal engineer at Rise. A second version, with 256KB of on-chip L2 cache, will follow, he said.
Targeting high performance instead of low cost, AMD expects to introduce its K7 processor in mid-1999, according to Dirk Meyer, director of engineering for the K7. The K7 system bus will run at 200MHz, twice the speed of today's PCs, he said.