Intel announced last week at its Professional Developer's Conference in Palm Springs, California, plans to ship manufacturing samples of its 64-bit Merced processor in mid-1999, with the production version following in mid-2000.
The company also announced that using a PC running the Merced simulator, it successfully booted seven different operating systems, including Microsoft's forthcoming Win64, Sun's Solaris, SCO's UnixWare Monterey, Novell's Modesto, and Hewlett-Packard's HP-UX. Intel also plans to fully support a 64-bit version of Linux.
At the developer's conference, a Microsoft executive said the 64-bit version of Windows, referred to as Win64, is under development for both Intel's IA-64 processor and Compaq's Alpha chip. Win64 for the Intel platform will ship when systems based on the Merced chip are released, and will be compatible with 32-bit Windows applications, according to Oscar Newkerk, technical evangelist in Microsoft's Developer Relations Group.
Despite a great deal of talk within the industry about the need for next-generation I/O technology to support 1-GHz processing, Merced's chip set -- the 82460GX -- will be PCI-based and run at only 66 MHz, Intel said. But the chip set will be I/O upgradable when Intel's next-generation I/O becomes available in 2002, officials said.
The Intel chip set will also limit the addressable memory space to 64GB, but an Intel representative said PC makers designing their own chip sets will be able to address "multiple terabytes" of memory.
One feature that will be available when the new chip set debuts is three levels of cache -- Level 0, Level 1, and Level 2 -- up from the two levels currently found in Intel's chips. Level 0 and Level 1 will both perform at processor speed, but it will perform with almost no latency because Level 0 is closest to the registers, officials said.
By 2001, other Intel 64-bit processors -- such as McKinley, which is the follow up to Merced and is slated to ship in production in late 2001 -- should perform faster than 1 GHz. In addition, the McKinley chip will have a system bus speed three times faster than Merced, officials said.
On stage at the conference, Intel demonstrated 1-GHz performance using a Pentium III processor. However, brute megahertz alone may not be able to put the Intel processor at the top of the performance heap, according to one industry observer.
"To get performance out of the EPIC [Intel's Explicit Parallel Instruction Computing] architecture, the software has to be optimised to use it," said Nathan Brookwood, chief analyst at Insight 64, in Saratoga, California. "To do that is a very challenging compiling task. That is where performance will come from, and it is not clear that Intel has done that yet."
According to Intel, new error-correcting technology in Merced will help OS vendors create high-availability features for enhanced error-handling support and monitoring, which will result in downtime measured in minutes per year.
Merced will be able to power systems such as eight-way, four-node clusters, and will be able to scale to Silicon Graphics' 512-way systems, according to Hemant Dhulla, IA-64 program manager at Intel.
Despite such advances in scalability, other chip manufacturers such as Compaq and Sun are not standing still, Brookwood pointed out, and there will still be a race to see whether Merced will outperform RISC processors.
"For IA-64 to have an impact on the industry, Intel will have to demonstrate superior value and performance, and they haven't shown that yet," Brookwood said.
The following are some of the features planned for Intel's IA-64.
* Explicit parallelism
* Static branch predication
* Parallel compares
* Data speculation
* Loop handling
* Multiway branch