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The Nehalem CPU's secret weapon

The Nehalem CPU's secret weapon

Intel's Nehalem CPU sports an on-chip power management microcontroller capable of turning off CPU cores to save power. This could really change the x86 server game. The question is, will IT be able to use this to cut costs, or will Intel lock the feature away for Dell and Microsoft?

Intel Developer Forum has wrapped up, and there's no question that Nehalem owned the show. Intel's engineering crew was practically beside itself; finally, it had something new to say to software and hardware developers. It was hard to tell whether the phrase "most significant update to Intel's x86 in ten years," uttered often by Intel staff, carried a tinge of frustration, but Nehalem's specs elevate that mantra from marketing to reality.

When Intel opened its raincoat last week to reveal Nehalem's secret weapon -- an on-package power management microcontroller -- I shouted "that's what I'm talking about!" Way to bring more than lip service to green IT, guys, and sooner than most observers (myself included) expected. Sign me up for three-level cache architecture, hyperthreading, and direct virtual machine links to physical peripherals, but if Nehalem's power management delivers its potential, and if Microsoft and Intel server OEMs exploit the technology, I'm open to declaring a new ball game in x86 servers.

Modern x86 CPUs are pretty stupid by mainframe standards. We got so caught up in making microprocessors fast, small, and cheap that we scooped out the qualities that have defined server systems since we referred to IT as Data Processing. AMD, with its close relationship with IBM, looked on track to make x86 server CPUs serious machinery, self-monitoring, self-healing, self-reporting, made of multiple autonomous units that can be dispatched to specialized tasks without interrupting the flow of common work. I never expected that Intel would beat AMD to it, but if AMD had done Nehalem, I'd judge it a functional early pass at elements of the mainframe-inspired server CPU design laid out by AMD's CTO two years ago.

Intel baked a small sample of task-specific autonomy into Nehalem with a couple of small, highly specialized instruction units that I see as flagbearers, a preview of what Intel is able to add to future x86 CPUs in microcode or through some similarly simple mechanism. But the more impressive accomplishment is Nehalem's incorporation of a power management microcontroller. Intel claims that this will monitor temperature, power utilization, and workload, and apportion that workload among as few processor cores as are needed to do the job. Cores that would ordinarily divvy up mundane threads that could be executed more efficiently by a single core aren't merely idled, they're powered down. At least that's the pitch. Intel is a bit coy with the details, except to say that in transistor count, Nehalem's power controller is similar in complexity to an 80486 CPU. The message there is that Nehalem's power controller really is an autonomous unit, and Intel's use of the term "microcontroller" signals to me that it is externally programmable. I'll be disappointed if reality doesn't match the message.


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