At the AMD CTO Summit held last week in Monterey, California, AMD put a few members of the press under nondisclosure and gave us an unusually detailed look at unpublished products and plans. Much of it is to be kept under wraps, but we were given leave to carry a few facts home to our constituents, including some related to the state of AMD's manufacturing process engineering.
In assessing these facts, three ancient axioms come to mind: Nice guys finish last, slow and steady wins the race, and haste makes waste. I'll let you plug these in as the story unfolds.
FUD (fear, uncertainty and doubt) marketing hits harder now than ever, when investors and analysts fancy themselves armchair experts in semiconductor process technology, and it's not in AMD's character to fight Intel's FUD with fire. It's trying to fight it with facts instead, hoping, perhaps unrealistically, that someone will listen. Intel claims that AMD is ill-equipped to upsize from 200 mm silicon wafers to the 300 mm wafer diameter that's standard at Intel. Wider wafers equates to more chips per wafer, and therefore to potentially higher manufacturing output. However, Intel leaves some elements out of this plot. AMD claims that its yields lead the industry, meaning that it consistently pulls more perfect chips from each manufacturing run than the average, so it hadn't the need to kick up to larger wafers to offset the number of bum chips per run. AMD partners with IBM to develop, test, and prepare each new process so that its kinks are worked out before that process hits manufacturing, rather than working them out on the manufacturing floor.
The methods that AMD and IBM have cooked up take time to manifest as finished product, but the companies use that time to do little side jobs such as periodically reinventing the transistor. The transistor innovation that AMD and IBM have developed brought most of the advantages of process shrink, like lower power consumption and reduced leakage in a transistor's off state, to manufacturing. As a result, AMD carried its present process, 65 nm (which is Intel's standard as well), into production only when its benefits exceeded those delivered by transistor evolution and not as a reaction to Intel or any other competitor. Each generation of AMD64 has increased clock and bus speed, and carried CPUs from single to dual-core, and yet AMD has managed to keep power consumption and heat absolutely flat. As a result, Opteron and Athlon FX, AMD's two leading chip lines, have years-long stability in power, cooling and socket specifications, enabling competition among third party chip set and motherboard makers. Features like hardware RAID, virus protection, firewall and safe overclocking are uncommon among Intel-branded chip sets, but are found frequently even in desktop chip sets made by NVidia and VIA, as well as by AMD's ATI division.
Regardless of size and position in the market, there is usually a gap between what a company says and what it does. These are hard to find at AMD. At the CTO Summit, AMD laid out a fully-finished 300 mm wafer to touch and photograph, and we were shown specifics on the fab rollout schedule for AMD's 45 nm process. We got an advance look at new AMD/ATI chip set technology as well, along with a completely new and radical AMD CPU, the non-disclosures on which lift this month. AMD is not running behind Intel. It is simply not practicing reactive engineering, and if you pay attention, you'll see that AMD's take on 45 nm process, 300 mm wafers, desktop chipsets and dual-core mobile architecture are more than mere snapshots of the marketed leading edge, which is a coat of gloss on the present. AMD, through its partnership with IBM, defines the leading edge. Watch.