The air in the arid desert of Chandler, Arizona, has little in common with the air found in the cool, damp forests of suburban Portland, Oregon. That is, unless you're working within the clean room of Intel's Fab 12 in Arizona.
In keeping with the company's Copy Exactly strategy for rolling out new manufacturing technologies, Fab 12 engineers needed to duplicate the air quality of a clean room in Hillsboro, Oregon, at the Arizona facility, said Steve Megli, Fab 12 co-plant manager, during the second day of an event for press and analysts at Intel's largest U.S. manufacturing site in Oregon.
Intel has already begun making processors using its new 65-nanometer process technology in Fab D1D in Hillsboro, the company's primary qualification plant for new manufacturing technologies. Processors made with the 65nm technology have smaller average feature sizes than processors made with the current 90nm generation of chip-making technology.
Over the remainder of this year and into 2006, Intel will begin to roll out that 65nm technology at fabs in Arizona and Ireland. The company does this by duplicating every possible aspect of the manufacturing process in D1D in the new production facilities. Fab 12 in Arizona was the first plant outside of Oregon to start making 65nm chips, and Intel faced several challenges in making the new technology work, Megli said.
For starters, Fab 12 is an eight-year-old facility. Intel chose to retrofit the facility for the 300-millimeter wafer era a few years ago rather than build a brand new facility to accommodate larger silicon wafers. This saved the company money, but putting new technology in an old building required some compromises.
Also, Intel was now using chip-making technology where an impossibly tiny discrepancy between the alignment of tools in Arizona versus tools in Oregon could cause problems, Megli said. The company had to figure out a way to locate and eliminate a mismatch on one particular tool that was less than one-tenth the width of a silicon atom, he said.
And then, of course, they had to change the air.
Outside air is always processed before it enters a clean room, but the processing done during the qualification of Intel's 65 nanometer process technology was designed for the air outside Fab D1D in Hillsboro, Megli said. Rather than break the rules of its Copy Exactly strategy, Fab 12 managers duplicated the makeup of Oregon air in a space outside the clean room, then sent it through the same processing steps used at D1D, he said.
Fab 12 was able to reach healthy yields within a very short amount of time after running the first wafer through its 65nm implementation, Megli said. Yield is a measure of how many working processors can be obtained from a wafer. Now Intel will look to duplicate that success at Fab 24-2 in Ireland, he said.
Going forward, Intel wants to extend this Copy Exactly strategy to the maintenance of the multimillion dollar tools used to build its chips, Megli said. Much of the work moving wafers from tool to tool and processing the wafers is now automated, which makes it easier to duplicate in new locations. But maintenance is still a labor-intensive task that Intel believes it can standardize on the same level as manufacturing.
The company is consulting with the airline industry and stock-car racers to learn how to implement reliable and speedy maintenance practices, Megli said. This will help it improve yields and therefore reduce manufacturing costs, because defects on chips are often caused by improperly installed spare parts on chip-making tools, he said.