Chip makers streamline measurement standards

Chip makers streamline measurement standards

Semiconductor manufacturers, aiming to cut costs and improve performance, are banding together in industry consortia that will standardise on measurement methods for embedded processors and on design and test techniques for pieces of ASICs.

One group, the EDN Embedded Microprocessor Benchmark Consortium, will develop a suite of benchmark tests to evaluate microprocessors used in embedded applications such as network computers and handheld PCs. The 20 members of the consortium include semiconductor manufacturers and providers - such names as Advanced RISC Machines and MIPS Technologies - of intellectual property (IP) such as CPU circuit designs.

Currently, the only standard for microprocessors is Dhrystone MIPS, said Markus Levy, president of the Consortium. Unfortunately, he said, "The Dhrystone MIPS standard does not provide a comprehensive or objective set of specifications. The result is limited confidence in the performance and functionality of data presented by vendors."

Benchmarks for processors used in consumer, networking, telecommunications, office automation, and automotive/industrial markets will let system design engineers and end users compare the comparative performance of CPUs and systems, Levy said.

"These benchmarks will help engineers see through the hype to the real performance they can expect in their system," said Bob Conrad, DSP product line director for Analog Devices, a member of the consortium.

Another industry consortium, the Virtual Socket Interface Alliance, aims to let any of its dozens of member semiconductor suppliers use function blocks such as CPU cores, memory, and input/output logic from any other member as "building blocks" for ASICs. By standardising on design, integration, and test techniques, VSI blocks cut the cost of these parts.

"As VSI-compliant hardware and software becomes available, it allows customers to bring their own IP with them or integrate others' IP," said Arnold Karpel, director of marketing in the processor and multimedia in the Semiconductor group of Toshiba America Electronic Components.

The first product to result from the VSI Alliance, announced by TAEC, is the TX19 MIPS RISC processor, available as an ASIC core and in a family of standard products. Karpel expects volume production to begin around the first of the new year.

The TX19 uses the MIPS16 instruction set architecture, which combines a 32-bit core with a 16-bit I/O instruction set to reduce code size and power consumption.

Applications include personal digital assistants, digital video, still cameras, printers, scanners, and hard disk drives.

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