Just as one group of Intel engineers slips its schedule for the next-generation 64-bit Merced processor, Intel's 32-bit central processor unit (CPU) designers are ramping up production more quickly than expected, bringing server and workstation, mainstream, and low-cost chips to market at a torrid pace.
An Intel executive explained that the company has been getting higher yields than expected at higher frequencies from Pentium II chips manufactured with 0.25-micron technology. As a result, Intel will be able to roll out higher-performance IA-32 CPUs sooner than planned on Intel's processor road map.
For example, the Tanner processor, planned for mid-1999, will be introduced in the first quarter next year. Like the Pentium II Xeon CPU, the chip will be housed in a Slot 2 package for servers with up to eight processors.
Tanner will run at 500MHz and will offer Intel's Katmai New Instructions to boost graphics performance, aiming the chip squarely at workstation applications.
Contrary to earlier industry reports, the Tanner CPU will not plug into Slot M, the interface being developed for the IA-64 Merced. Some industry observers expected Tanner to bridge the gap between IA-32 and IA-64 designs.
Before Tanner, Intel will roll out a 450-MHz version of the Pentium II Xeon in the second half of this year. The chip will come with 512KB, 1MB, or 2MB of Level 2 (L2) cache memory.
In the mainstream, Intel will complement the 350MHz and 400MHz Slot 1 Pentium II processors with a 450MHz CPU before the end of the year.
Intel will unveil the Slot 1 Katmai processor in the first quarter next year, about four months ahead of schedule. Like Tanner, the chip will offer Katmai New Instructions for higher-performance graphics.
At the low-cost end of the spectrum, Intel will draw in the scheduled launch of a 300MHz Celeron processor without L2 cache -- a so-called Covington design -- from this fall to this month.
More important, Intel will launch 300MHz and 333MHz versions of the Celeron CPU with 128KB of on-chip L2 cache, developed under the code name Mendocino, before the end of this year. The 300MHz chip was scheduled for the fourth quarter, but the 333MHz version wasn't scheduled to appear until the first quarter next year.