While continuing its relentless pursuit of performance, Intel has quietly been developing Transition Management, a technology program to help customers cope with constant changes in CPU technologies.
Transition Management is claimed to stabilize PC designs by keeping platform components such as core logic and memory interfaces consistent through generations of CPUs.
The goal is to upgrade processors without having to re-qualify entire systems, said William Swope, vice president of the Intel Architecture Business Group.
"This is a big engineering effort," Swope said.
"Designing products for multiple CPU generations is not an easy task." He added that it requires extensive knowledge of new CPUs long before they are introduced and a careful design that will work with multiple clock speeds, multiple interface buses, and increasingly fast processors.
The technology, which has been under development for several years, will allow Intel to create chip sets that do not change as the system bus changes. For example, one chip set will accommodate a 66MHz system bus used by Celeron processors or a 100MHz system bus used by Pentium II processors that perform at 350MHz and faster. As Intel transitions to a 133MHz system bus it will be possible to have a single chip set that addresses both 100MHz and 133MHz performance.
For example, the 440BX was designed for several generations of chips, Swope explained. The chip will support the Katmai processor that is slated for introduction early in 1999, and will not be joined by a new chip set design until midyear.